View 74VCX16245MTDX_1203044.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

74VCX16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
October 1996 Revised June 2005
74VCX16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. The 74VCX16245 is designed for low voltage (1.2V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The 74VCX16245 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.
Features
s 1.2V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD
2.5 ns max for 3.0V to 3.6V VCC
s Power-off high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
s Uses patented noise/EMI reduction circuitry s Latchup performance exceeds 300 mA s ESD performance:
Human body model ! 2000V Machine model !200V
s Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number 74VCX16245G (Note 2)(Note 3) 74VCX16245MTD (Note 3) Package Number BGA54A MTD48 Package Description 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2: Ordering code "G" indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
(c) 2005 Fairchild Semiconductor Corporation
DS012169
www.fairchildsemi.com
74VCX16245
Connection Diagrams
Pin Assignment of TSSOP
Pin Descriptions
Pin Names OEn T/Rn A0-A15 B0-B15 NC Description Output Enable Input (Active LOW) Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs No Connect
FBGA Pin Assignments
1 A B C D E F G H J B0 B2 B4 B6 B8 B10 B12 B14 B15 2 NC B1 B3 B5 B7 B9 B11 B13 NC 3 T/R1 NC VCC GND GND GND VCC NC T/R2 4 OE1 NC VCC GND GND GND VCC NC OE2 5 NC A1 A3 A5 A7 A9 A11 A13 NC 6 A0 A2 A4 A6 A8 A10 A12 A14 A15
Truth Tables
Pin Assignment for FBGA OE1 L L H Inputs OE2 L L H (Top Thru View) T/R2 L H X Outputs Bus B8-B15 Data to Bus A8-A15 Bus A8-A15 Data to Bus B8-B15 HIGH Z State on A8-A15, B8-B15 Inputs T/R1 L H X Outputs Bus B0-B7 Data to Bus A0-A7 Bus A0-A7 Data to Bus B0-B7 HIGH Z State on A0-A7, B0-B7
H HIGH Voltage Level L LOW Voltage Level X Immaterial (HIGH or LOW, inputs and I/O's may not float) Z High Impedance
Logic Diagram
www.fairchildsemi.com
2
74VCX16245
Absolute Maximum Ratings(Note 4)
Supply Voltage (VCC) DC Input Voltage (VI) Output Voltage (VO) Outputs 3-STATE Outputs Active (Note 5) DC Input Diode Current (IIK) VI 0V DC Output Diode Current (IOK) VO 0V VO ! VCC DC Output Source/Sink Current (IOH/IOL) DC VCC or Ground Current per Supply Pin (ICC or Ground) Storage Temperature Range (TSTG)
0.5V to 4.6V 0.5V to 4.6V 0.5V to 4.6V 0.5 to VCC 0.5V 50 mA 50 mA 50 mA r50 mA r100 mA 65qC to 150qC
Recommended Operating Conditions (Note 6)
Power Supply Operating Input Voltage Output Voltage (VO) Output in Active States Output in 3-STATE Output Current in IOH/IOL VCC VCC VCC VCC VCC 3.0V to 3.6V 2.3V to 2.7V 1.65V to 2.3V 1.4V to 1.6V 1.2V 0V to VCC 0.0V to 3.6V 1.2V to 3.6V
0.3V to 3.6V
Free Air Operating Temperature (TA) Minimum Input Edge Rate ('t/'V) VIN 0.8V to 2.0V, VCC 3.0V
r24 mA r18 mA r6 mA r2 mA r100 PA 40qC to 85qC
10 ns/V
Note 4: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the "Electrical Characteristics" table are not guaranteed at the Absolute Maximum Ratings. The Recommended Operating Conditions tables will define the conditions for actual device operation. Note 5: IO Absolute Maximum Rating must be observed. Note 6: Floating or unused pin (inputs or I/O's) must be held HIGH or LOW.
DC Electrical Characteristics
Symbol VIH Parameter HIGH Level Input Voltage Conditions VCC (V) 2.7 - 3.6 2.3 - 2.7 1.65 - 2.3 1.4 - 1.6 1.2 VIL LOW Level Input Voltage 2.7 - 3.6 2.3 - 2.7 1.65 - 2.3 1.4 - 1.6 1.2 VOH HIGH Level Output Voltage IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH 2.0 1.6 0.65 x VCC 0.65 x VCC 0.65 x VCC 0.8 0.7 0.35 x VCC 0.35 x VCC 0.05 x VCC VCC - 0.2 2.2 2.4 2.2 VCC - 0.2 2.0 1.8 1.7 VCC - 0.2 1.25 VCC - 0.2 1.05 VCC - 0.2 V V V Min Max Units
100 PA 12 mA 18 mA 24 mA 100 PA 6 mA 12 mA 18 mA 100 PA 6 mA 100 PA 2 mA 100 PA
2.7 - 3.6 2.7 3.0 3.0 2.3 - 2.7 2.3 2.3 2.3 1.65 - 2.3 1.65 1.4 - 1.6 1.4 1.2
3
www.fairchildsemi.com
74VCX16245
DC Electrical Characteristics
Symbol VOL Parameter LOW Level Output Voltage IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL II IOZ IOFF ICC Input Leakage Current 3-STATE Output Leakage Power Off Leakage Current Quiescent Supply Current Increase in ICC per Input
(Continued)
VCC (V) 100 PA 12 mA 18 mA 24 mA 100 PA 12 mA 18 mA 100 PA 6 mA 100 PA 2 mA 100 PA 2.7 - 3.6 2.7 3.0 3.0 2.3 - 2.7 2.3 2.3 1.65 - 2.3 1.65 1.4 - 1.6 1.4 1.2 1.2 - 3.6 1.2 - 3.6 0 1.2 - 3.6 1.2 - 3.6 2.7 - 3.6 0.2 0.4 0.4 0.55 0.2 0.4 0.6 0.2 0.3 0.2 0.35 VCC - 0.1 V
Conditions
Min
Max
Units
0V d VI d 3.6V 0V d VO d 3.6V VI VI VIH VIH or VIL VCC or GND VCC 0.6V 0V d (VI, VO) d 3.6V VCC d (VI, VO) d 3.6V (Note 7)
r5.0 r10
10 20
PA PA PA PA PA
r20
750
'ICC
Note 7: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
Symbol tPHL tPLH CL tPZL tPZH CL tPLZ tPHZ CL tOSHL tOSLH Output to Output Skew (Note 9) CL
Note 8: For CL
(Note 8)
Conditions VCC (V) 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 TA
Parameter Propagation Delay CL
40qC to 85qC
Max 2.5 3.0 6.0 12.0 30 3.8 4.9 9.3 18.6 46.5 3.7 4.2 7.6 15.2 38 0.5 0.5 0.75 1.5 1.5 0.8 1.0 1.0 1.0 1.5 0.8 1.0 1.5 1.0 1.5 0.8 1.0 1.5 1.0 1.5
Min
Units
Figure Number Figures 1, 2
30 pF, RL
500:
ns Figures 5, 6 Figures 1, 3, 4 ns Figures 5, 7, 8 Figures 1, 3, 4 ns Figures 5, 7, 8
15 pF, RL 30 pF, RL
2k: 500:
1.5 r 0.1 1.2 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15
Output Enable Time
CL
15 pF, RL 30 pF, RL
2k: 500:
1.5 r 0.1 1.2 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15
Output Disable Time
CL
15 pF, RL 30 pF, RL
2k: 500:
1.5 r 0.1 1.2 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15
CL
ns
15 pF, RL
2k:
1.5 r 0.1 1.2
50pF, add approximately 300ps to the AC maximum specification.
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
www.fairchildsemi.com
4
74VCX16245
Dynamic Switching Characteristics
Symbol VOLP Parameter Quiet Output Dynamic Peak VOL CL 30 pF, VIH Conditions VCC, VIL 0V VCC (V) 1.8 2.5 3.3 VOLV Quiet Output Dynamic Valley VOL CL 30 pF, VIH VCC, VIL 0V 1.8 2.5 3.3 VOHV Quiet Output Dynamic Valley VOH CL 30 pF, VIH VCC, VIL 0V 1.8 2.5 3.3 TA
25qC
0.25 0.6 0.8
Typical
Units
V
0.25 0.6 0.8
1.5 1.9 2.2 V V
Capacitance
Symbol CIN CI/O CPD Input Capacitance Output Capacitance Power Dissipation Capacitance Parameter VCC VI VI Conditions 1.8V, 2.5V, or 3.3V, VI 0V, or VCC, VCC 0V or VCC, F 0V or VCC 1.8V, 2.5V or 3.3V TA
25qC
6 7 20
Typical
Units pF pF pF
1.8V, 2.5V or 3.3V
10 MHz, VCC
5
www.fairchildsemi.com
74VCX16245
AC Loading and Waveforms (VCC 3.3V r 0.3V to 1.8V r 0.15V)
FIGURE 1. AC Test Circuit TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ VCC x 2 at VCC SWITCH Open 6V at VCC 3.3 r 0.3V; 2.5 r 0.2V; 1.8V r 0.15V GND
FIGURE 2. Waveform for Inverting and Non-inverting Functions
FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic Symbol Vmi Vmo VX VY VCC 3.3V r 0.3V 1.5V 1.5V VOL 0.3V VOH 0.3V 2.5V r 0.2V VCC/2 VCC/2 VOL 0.15V VOH 0.15V 1.8V r 0.15V VCC/2 VCC/2 VOL 0.15V VOH 0.15V
www.fairchildsemi.com
6
74VCX16245
AC Loading and Waveforms (VCC 1.5V r 0.1V to 1.2V)
TEST tPLH, tPHL tPZL, tPLZ
SWITCH Open VCC x 2 at VCC 1.5 r 0.1V
FIGURE 5. AC Test Circuit
FIGURE 6. Waveform for Inverting and Non-Inverting Functions
FIGURE 7. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
FIGURE 8. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic Symbol Vmi Vmo VX VY VCC 1.5V r 0.1V VCC/2 VCC/2 VOL 0.1V VOH 0.1V
7
www.fairchildsemi.com
74VCX16245
Physical Dimensions inches (millimeters) unless otherwise noted
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A
www.fairchildsemi.com
8
74VCX16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 9 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
www.fairchildsemi.com

▲Up To Search▲

Price & Availability of 74VCX16245MTDX

	To Download 74VCX16245MTDX Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .